G.722.1

G.722.1

CODEC OVERVIEW

G.722.1 speech codec was standardized by ITU-T in 1999. G.722.1 Annex C, support for Super Wideband audio coding, was standardized by ITU-T in 2005. The codec operates on 20 ms of 16-bit speech/audio signals of bandwidth 7kHz or 14 KHz (Annex-C), sampled at 16 KHz or 32 KHz respectively and generates a compressed bit-streams having bit rates of 16, 24, 32 and 48 kbps respectively. The algorithm transforms the speech/audio signals using the Modulated Lapped Transform (MLT) and the coefficients are encoded independently using variable length Huffman codes. The target applications for this codec include wideband IP telephony, audio conferencing, audio streaming, and audio playback.

SALIENT FEATURES
  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech/audio signals sampled at 16 kHz or 32kHz.
  • Support for 16kbps, 24 kbps, 32 kbps bit-rates at 16 KHz sampling frequency.
  • Support for 24 kbps, 32 kbps, and 48 kbps bit-rates at 32 KHz sampling frequency.
  • Optional support for RTP payload format as specified in RFC 5577.
  • Support for change of encoding rate at frame boundary.
  • Optional support for xDM APIs.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible.
  • Tested for any illegal memory access by the module (ARM and C64x+).
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK, DM6446, DM6467, and OMAP3530.
  • ARM implementation validated on OMAP3530 (Cortex-A8), DM6446/DM6467 (ARM926EJ-S) platforms.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.

For datasheet with resource usage details

G.729.1

G.729.1

CODEC OVERVIEW

G.729.1 speech/audio codec was standardized by ITU-T in 2006. The codec operates on each 20ms frame of 16-bit speech/audio signals sampled at 8 KHz or 16 KHz and generates a compressed bit-stream having bit-rates in the range of 8 kbps  32 kbps structured as 12 layers. The layered approach allows the decoder or any other component in the communication system to truncate the bit-stream by removing the higher layers. The base layer, at 8 kbps, is inter-operable with the G.729 codec. The second layer, at 12 kbps, is the narrowband enhancement layer. Bandwidth extension is added in layer three and predictive transform coding based on MDCT improves the quality from layer four to twelve. The encoder has an inherent support for FEC for bit-rates greater than 12 kbps. The decoder supports the G.729B VAD/DTX scheme has an inherent packet loss concealment algorithm. The codec is primarily targeted for wideband VoIP applications.

SALIENT FEATURES
  • Based on ITU-T specification
  • Optimized ASM/C implementation (C55x and C64x+, sub-optimal on ARM)
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech signals sampled at 8 KHz or 16 KHz.
  • Support for 8 – 32 kbps bit-rates.
  • Support for encoding G.729 compatible bit-streams.
  • Support for RTP payload format as specified in RFC 4749 and RFC 5459.
  • Supports G.729B VAD/DTX mode of operation configurable at init-time.
  • Support for optional low delay decoding mode, configurable at init-time.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • Support for bad frame indication at frame boundary.
  • The implementation supports both Little-Endian and Big-Endian (on ARM and C64x+ platforms)
  • Optional support for xDM APIs for TI implementations.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (Maximum interrupt latency on C64x+ is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x+ and ARM).
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Tested for Interoperability.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x, TI C64x+,  and TI C66x.

For datasheet with resource usage details

G.729

G.729

CODEC OVERVIEW

G.729 speech codec was standardized by ITU-T in 1996. The codec operates on each 10ms frame of 16-bit speech signals sampled at 8 KHz and generates a compressed bit-stream of 8 kbps. It has a look-ahead delay of 5 ms and uses conjugate-structure algebraic code excited linear prediction (CS-ACELP) algorithm for compression. Annex A of the standard specifies a low complexity version and Annex B specifies a voice activity detection (VAD) algorithm as well the discontinuous transmission mode of operation. In 2005, ITU-T extended the Annex-B to provide additional options for the VAD algorithm. Annex D specifies operation at 6.4 kbps. Annex E specifies operation at 11.8 kbps suitable for music signals. Annex G specifies operation at 8 kbps or 11.8 kbps. The decoder supports an inherent packet loss concealment algorithm. The codec is widely used in VoIP applications.

SALIENT FEATURES
  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech signals sampled at 8 KHz.
  • Support for 6.4/8/11.8 kbps bit-rate.
  • Support for RTP payload format as specified in RFC 3551.
  • Supports integrated DTX mode of operation configurable at init-time.
  • Support for all the three VAD algorithms, configurable at init-time.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • Support for bad frame indication at frame boundary.
  • The implementation supports both Little-Endian and Big-Endian (on ARM and C64x+ platforms).
  • Optional support for xDM APIs on TI platforms.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (maximum interrupt latency on C64x+ is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x+ and ARM).
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • TI C64x implementation validated on Spectrum Digital C6416 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • Cortex-M4 implementation validated on the TI Tiva TM4C1294 EVM.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-M4, Cortex-A8, Cortex-A9, TI C55x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.

For datasheet with resource usage details

G.728

G.728

CODEC OVERVIEW

G.728 speech codec was standardized by ITU-T in 1992. The codec operates on 16-bit speech signal sampled at 8 KHz and generates compressed bit-streams with a bit-rate of 16 kbps. It is based on low delay code excited linear prediction (LD-CELP) algorithm. The decoder has an inherent packet loss concealment mechanism. It is used in video conferencing, satellite telephony, and voice over cable applications.

SALIENT FEATURES
  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech/audio signals sampled at 8 KHz.
  • Support for 16 kbps bit-rate.
  • Support for configurable frame sizes in multiples of 2.5 ms.
  • Support for RTP payload format as specified in RFC 3551.
  • Support for post-filter option, configurable at init-time.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • Support for PLC for frame size of the order of 1ms.
  • The implementation supports both Little-Endian and Big-Endian (on C64x platform)
  • Optional support for xDM APIs on TI platforms.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (Maximum interrupt latency on C64x is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x)
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
AVAILABLE PLATFORM(S)

TI C55x, TI C64x+., and TI C66x.

For datasheet with resource usage details

G.723

G.723

CODEC OVERVIEW

G.723.1A speech codec was standardized by ITU-T in 1996. The codec operates on each 30ms frame of 16-bit speech signals sampled at 8 KHz and generates a compressed bit-stream having bit-rates of 5.3 and 6.3 kbps respectively. It has a look-ahead delay of 7.5 ms and uses algebraic code excited linear prediction (ACELP) algorithm for the low bit-rate and Multi-Pulse Maximum Likelihood Quantization (MP-MLQ) algorithm for the high bit-rate modes. Annex A of the standard specifies a voice activity detection algorithm as well the discontinuous transmission mode of operation. The decoder supports an inherent packet loss concealment algorithm. Support for this codec is mandatory for ITU-T H.324 terminals offering audio communication. It is also widely used in VoIP applications.

SALIENT FEATURES
  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech signals sampled at 8 KHz.
  • Support for 5.3 and 6.3 kbps bit-rates.
  • Support for swapping the bit-rates at frame boundary.
  • Support for optional high-pass filter configurable at init-time.
  • Support for RTP payload format as specified in RFC 3551.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • Support for bad frame indication (CRC) at frame boundary.
  • Support for post-filter operation, configurable at frame boundary.
  • Supports integrated DTX mode of operation configurable at init-time.
  • The implementation supports both Little-Endian and Big-Endian (on ARM and C64x platforms).
  • Optional support for xDM APIs on TI platforms.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (Maximum interrupt latency on C64x is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x and ARM).
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • TI C64x implementation validated on Spectrum Digital C6416 DSK.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • Cortex-M4 implementation validated on the TI Tiva TM4C1294 EVM.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-M4, Cortex-A8, Cortex-A9, TI C55x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.

For datasheet with resource usage details

G.726

G.726

CODEC OVERVIEW

G.726 speech codec was standardized by ITU-T in 1990. The codec converts a G.711 encoded speech signals sampled at 8 KHz to a 16, 24, 32, or 40 kbps bit-stream respectively and vice-versa. It is based on Adaptive Differential Pulse Code Modulation (ADPCM) algorithm. Annex A allows use of uniform PCM interface at input and output. It is used in VoIP applications.

SALIENT FEATURES
  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on G.711 encoded bit-stream or speech signals sampled at 8 KHz.
  • Support for 16, 24, 32, 40 kbps bit-rates.
  • Support for configurable frame sizes.
  • Support for RTP payload format as specified in RFC 3551.
  • Optional support for VAD/DTX/CNG and PLC modules.
  • The implementation supports both Little-Endian and Big-Endian (on ARM and C64x platforms).
  • Optional support for xDM APIs on TI platforms.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (Maximum interrupt latency on C64x is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x and ARM).
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • TI C64x implementation validated on Spectrum Digital C6416 DSK.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x, TI C64x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.

For datasheet with resource usage details

G.722

G.722

CODEC OVERVIEW

G.722 speech codec was standardized by ITU-T in 1988. The encoder operates on 14-bit speech/audio signals sampled at 16 KHz and generates a compressed bit-stream having a bit rate of 64kbps. The codec transforms the speech/audio signals using the Sub-Band ADPCM (SB-ADPCM) algorithm. The application at the transmit side can truncate each octet generated by the encoder by 1 or 2 bits to insert auxiliary data before transmission. The codec therefore provides an auxiliary data channel rate of 0, 8 or 16 kbps respectively. Decoder can be operated in one of 3 modes corresponding to bitrates 64, 56 or 48 kbps respectively. Appendix IV of the standard specifies a low complexity PLC algorithm for the decoder. The target applications for this codec includes the fixed network Voice over IP applications.

SALIENT FEATURES
  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech/audio signals sampled at 16 KHz.
  • Configurable frame length (minimum size — 2 samples, default – 160 samples)
  • Support for 48, 56, and 64 kbps bit-rates.
  • Support for RTP payload format as specified in RFC 3551.
  • Support for packet loss concealment as specified in Appendix IV of the Standard.
  • Optional support for xDM APIs on TI platforms.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible.
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • TI C64x implementation validated on Spectrum Digital C6416 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.

For datasheet with resource usage details

G.718

G.718

CODEC OVERVIEW

G.718 speech codec was standardized by ITU-T in 2008. The codec operates on each 20 ms frame of 16-bit speech signals sampled at 8 KHz or 16 KHz and generates a compressed bit-stream having bit-rates in the range of 8 – 32 kbps. The encoder has an embedded scalable structure producing a bit-stream structured in five layers corresponding to the bit-rates 8, 12, 16, 24, and 32 kbps respectively. The lower two layers use CELP algorithm to encode while the higher layers are based on overlap-add MDCT transform coding. The encoder supports an integrated DTX/CNG mode operation. When the bit-rate is limited to 12 kbps, the encoder provides an option for noise suppression, and a low-delay mode of operation. The codec also provides an alternative coding mode 12.65 kbps, inter-operable with AMR-WB (G.722.2) and VMR-WB codecs. The decoder supports an inherent packet loss concealment algorithm and is also capable of decoding all the operating modes of G.722.2 codec. The codec is targeted for telephony/streaming applications on fixed, wireless, and mobile networks.

SALIENT FEATURES
  • Based on ITU-T specification (06/2008).
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech signals sampled at 8 KHz or 16 KHz.
  • Support for 8 – 32 kbps bit-rates.
  • Support for the integrated noise suppression algorithm.
  • Support for configurable minimum noise suppression level ranging between 0 and 20dB.
  • Support for RTP payload format.
  • Support for integrated DTX mode of operation.
  • Support for configurable SID interval ranging between 1 and 100.
  • Support for low delay mode of operation.
  • Support for inter-operability with G.722.2 codec.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • The implementation supports both Little-Endian and Big-Endian (on C64x+ platform).
  • Optional support for xDM APIs for TI implementations.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (Maximum interrupt latency on C64x+ is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x+).
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Tested for Interoperability.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
AVAILABLE PLATFORM(S)

TI C64x+ and TI C66x

For datasheet with resource usage details

FLAC

FLAC

CODEC OVERVIEW

Free Lossless Audio Codec (FLAC) is an open source codec first released in the year 2001. It is a lossless audio codec i.e., the decoder output signal is  exactly the same as the encoder input signal. It operates on up to 8 channel, 4  32 bit PCM audio signals sampled at 8 KHz  655.35 KHz and provides a typical compression ratio in the range of 30% – 60%. The compression strategy is to exploit the temporal correlation and encode the residue using Rice coding algorithm. The bit-stream includes CRC information to detect corrupted frames, and also supports tagging, cue sheets and fast seeking. FLAC is a popular lossless audio codec and is used in audio playback, streaming and archival applications.

SALIENT FEATURES
  • Based on the open source standard.
  • Optimized ASM/C implementation.
  • Re-entrant implementation
  • C-callable APIs
  • Support for 4 32 bit PCM output audio signals with sampling frequency 8 KHz 655.35 KHz.
  • Support for up to 5.1 audio channels.
  • Support for block lengths ranging from 16 to 65535 samples.
  • Support for subset and non-subset formats.
  • Supports downmixing to mono or stereo output.
  • Supports Interleaved and de-interleaved output.
  • Optimized for low memory foot print.
  • Supports Little-Endian implementation on ARM
  • Optional support for OGG container format.
  • Optional support for xDM API’s.
TESTING FEATURES
  • Tested for bit-compliance using a large database of audio test vectors
  • Tested for mono, 2-channel, and 5-channel stereo test vectors
  • Tested for graceful exit in case of bit-stream related errors or exception.
  • Tested for illegal memory access by the module on ARM platform.
  • Module is fully interruptible.
  • Tested for compliance with register preservation requirements
  • Tested for Input buffer corruption
  • Tested for I/O buffer alignment requirements
  • Tested for multi-instance implementation.
  • Tested with scratch contamination at frame boundaries
  • Tested for 100% code coverage
  • Range validation of all API parameters
  • ARM implementation is validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
AVAILABLE PLATFORM(S)

ARM9E, ARM11, Cortex-A8, and Cortex-A9

For datasheet with resource usage details

EVRC-WB

EVRC-WB (EVRC-C)

CODEC OVERVIEW

Enhanced Variable Rate Codec Wideband (EVRC-WB or EVRC-C) was standardized by 3GPP2 in 2007. The EVRC-C codec operates on each 20ms frame of 16-bit speech signals sampled at 8 or16 KHz and generates compressed bit-stream of 171, 80, 40, or 16 bits respectively. EVRC-C splits the speech spectrum into low frequency and high frequency bands and compresses them separately. Coding of low frequency signal is based on EVRC-B standard while a LPC based coding scheme is used for the high frequency signal. It also contains a generic audio coding mode that can be used for handling non-speech signals such as music-on-hold and ring back tones. The principal applications of this codec are wideband telephony, video-telephony, gaming, streaming and ring back tones.

SALIENT FEATURES
  • Based on 3GPP2 specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech signals sampled at 8 or 16 KHz.
  • Support for selecting anchor operating mode or average rate mode during initialization time.
  • Support for 8.3, 7.42, and 4.0 kbps average source encoding bit-rates.
  • The maximum and minimum bit-rates can be configured during initialization.
  • The noise suppression module can be configured during initialization.
  • Support for dim and burst, eighth rate hangover, and null traffic frame features specified in the standard.
  • Support for RTP payload format as specified in RFC 5188.
  • Support for DTMF and TTY/TDD signals as specified in the standard.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • Support for post-filter operation, configurable at frame boundary.
  • Supports integrated DTX mode of operation.
  • Support for choosing Motorola DTX/QualComm DTX at compile time.
  • Support for encoding music signals.
  • Support for decoding music signals.
  • Support for setting the minimum and maximum DTX update interval during initialization.
  • Optional support for xDM APIs on TI platforms.
TESTING FEATURES
  • Tested for bit-exactness with standard as well as a large database of non-standard test ectors.
  • Module is fully interruptible.
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK, DM6467, DM6446, and OMAP3530 platforms.
AVAILABLE PLATFORM(S)

TI C55x and TI C64x+

For datasheet with resource usage details