Portfolios - Page 2 of 7

Parallel Redundancy Protocol (PRP)

Redundancy in communication networks is critical in substation automation, processing, and manufacturing application. Although there are several media redundancy communication protocols, instant switchover to backup or secondary pathways with zero reconfiguration time is required for protection of electrical substation, synchronized drivers, high-power inverters, and printing machines. Parallel Redundancy Protocol (PRP) meets these criteria and is commonly used in substation automation especially for process bus implementation.

IEC Standard (IEC 62439-3, Clause 4) providing redundancy for standard Ethernet based networks
Two physical network ports are used for communication, which are connected to independent networks respectively.
Each Ethernet frame is duplicated and transmitted on both the networks.
The receiver discards the duplicate frame and forwards a single copy to the higher layers of network stack.
The entire process of duplicating on the transmit side and discarding the duplicates on the receiver is done
seamlessly and unknown to the application.
The two networks have to be independent but need not be identical. However they should have similar timing delays.
Failure of a network component on a network still ensures that the duplicate is received by the receiver.
Can be easily scaled to large complex networks, but the cost of duplicate network resources also scales correspondingly.

We have advanced level expertise with the design and implementation of the PRP on the Texas Instruments Sitara platform with Linux/RTOS running on the ARM core and the firmware running on the Programmable Real-time Unit (PRU) core within the Industrial Communication Sub-System (ICSS). Frame duplication on the transmit side and duplicate discard on the receive side has been offloaded to the firmware to improve the OS performance on the ARM host. The implementation has been tested rigorously under heavy traffic conditions in conjunction with the PTP protocol. Further enhancements in the performance of the driver and the firmware is currently work in progress.

5-Port Industrial Ethernet Switch

CouthIT’s 5-Port Learning Industrial Ethernet Switch is industry’s first such implementation on the TI Sitara AM572x platform. It has been successfully deployed on the field and has achieved PROFINET compliance.

Uses 1 MAC and 1 IP address to implement the 5-port switch.
Uses all the 4 PRU ports on the TI AM57xx Sitara platform.
The 5th port is the ARM host core providing immense flexibility to develop custom applications as well as managing the 4 PRU ports.
Supports 100 Mbps throughput across all the four ICSS PRU ports.
PRU firmware compliant to IEEE 802.1 Ethernet Standards.
Each port has dedicated queues thereby avoiding all queue contention related complexities resulting in improved performance.
Support for storm-prevention.
Support for per-port statistics.
Support for learning on all 4 ICSS PRU ports.
Can also be customized to work as two 3 Port Ethernet Switch with the ARM host core being the common port.

Validated on the TI Sitara AM572x IDK
Throughput testing for unidirectional and bi-directional traffic across all the 4 PRU ports.
Tested using unicast, multicast and broadcast packets across all the four PRU ports.
Tested for QoS by sending packets with different priority levels.
Tested to verify learning on the host and PRU ports.
Tested to verify the statistics generated by the PRU ports are correct.
Tested to verify that the local-link frames are not forwarded by the switch.

TI Sitara AM572x

VoIP on ARM

CouthIT’s Voice over IP library is a bundled collection of software components that allows to make a end-to-end voice calls over IP networks. This module provides an integrated framework for voice communications over Internet clouds while ensuring maximum voice quality, minimizing distortions such as echo and background noise, intelligently managing the network jitter experienced by IP packets for protection against network impairments such as latency, out of order arrival of packets and packet losses. The implementation is targeted for VOIP Phone, Media Gateways, streaming media applications and voice messaging.

Optimized ASM/C implementation.
Re-entrant implementation.
C-callable APIs
Support for 8 KHz and 16 KHz sampling frequency.
Supports G.711, G.729AB, G.726 and G.723.1A speech codecs (optional support for other speech codecs).
Support for VAD/DTX/CNG with G.711 and G.726 to reduce channel payload during silence periods.
Support for arbitrary packet size (default set to 20 ms).
Noise suppression enhances the speech signal by suppressing stationary and non-stationary background noises.
AGC adaptively maintains the dynamic range of a speech signal without amplifying the non speech portions.
Acoustic echo canceler removes unwanted echo from the speech signals while providing near full duplex communications.
Provides packet loss concealment in case of missing packets to improve the speech quality.
Jitter buffer compensates for IP based network impairments such as latency, out of order arrival of packets.
Support for static or adaptive jitter buffer; maximum jitter delay configurable at initialization time.
Optimized for low memory foot print and low complexity.

Tested using a large database of test vectors simulating real use scenarios.
Tested over Internet cloud for real time performance.
Evaluated Noise suppression modules using babble, car, street, and a combination of stationary and non-stationary background noises.
Evaluated AGC Module for different speech levels from -15dBov to -40dBov
Tested using network simulator implementation for out of order arrival of packets.
Tested using random arrival time distribution models including linear, uniform, Gaussian and Poisson distribution.
Performance benchmarked using objective evaluation measures such as log likelihood ratio, segmental SNR and weighted spectral slope.
Tested by integrating with open-source RTP/RTCP and SIP and registering with Asterisk PBX server.
Tested for interoperability using multiple open-source and proprietary VoIP client software.
Tested for graceful exit in case of errors or exception.
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Module is fully interruptible.
Tested for 100% code coverage
Range validation of all API parameters.
Code validated on ARM926EJ-S (OMAP L138) platform running Open Embedded Linux.

ARM9E, ARM11, Cortex-A8, and Cortex-A9

Sample Rate Converter

Sample Rate Converter (SRC) is used for converting a digitized speech/audio stream sampled at a specific frequency to a desired sampling frequency. The algorithm interpolates the new samples using a truncated sinc function (low pass) filter. The performance of the algorithm is dependent on the length of the filter and there is a trade-off between quality (SNR, bandwidth) and complexity (memory and MCPS). SRC is used in digital audio mixing consoles, multimedia players, and for converting the sampling frequencies for interoperability issues.

ANSI-C fixed-point implementation.
Re-entrant implementation
Support for low complexity (memory footprint and MCPS) with different filter lengths at compile time.
Supported filter lengths are 32, 48, 84 and 276.
Supports input sampling frequencies from 8KHz to 48KHz (8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48).
Supports output sampling frequencies from 8KHz to 48KHz (8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48).
With filter length of 276, SNR > 100 dB when the re-sampling factor is a multiple of 2; ~90 dB for other cases.
Supports mono and stereo input and output.
Supports interleaved stereo at input and output.
Accepts 16-bit PCM at input.
Generates 16-bit PCM output.
Code validated on TI C64x+ platform.

Tested using a large database of speech and audio samples.
Exhaustively tested for overflow conditions with high energy test cases.
Objectively benchmarked with SNR, Bandwidth and Stopband rejection tests.
Subjective listening tests to ensure that there are no audible errors.
Verified linearity of the phase response of the filters.

ARM9E, ARM11, Cortex-A8, and Cortex-A9

Jitter Buffer

CouthIT’s jitter buffer implementation intelligently manages the network jitter experienced by IP packets having multimedia content to enable smooth play out of audio or speech without any discontinuity. The algorithm operates using a static or adaptive buffer size to compensate various network impairments such as out of sequence arrival of packets and packet loss during spike/burst in the network. The implementation is targeted for VoIP and streaming media applications and is compatible with all standard speech codecs.

Fixed-point ANSI C implementation.
Re-entrant implementation.
C-callable APIs
Module is fully interruptible.
Implementation independent of the sampling rate.
Compatible with narrow band speech codecs G.711, G.729AB, G.726 and G.723.1A.
Support for arbitrary packet size.
Automatically adapts to the real time jitter experienced by the packets when codec VAD is enabled.
User can configure to use either static or adaptive jitter buffer.
Maximum buffer size configurable at initialization time.
Protection against packet loss in case of spike/burst in the network.
Protection against out of sequence arrival of packets.
Provides a flag indicating PLC or silence insertion to be done at decoder side.
Provides statistics about packet lost rate.
Optimized for low memory foot print and low complexity.
Integrated with CouthIT’s Implementation of VAD and PLC (optional).

Tested using a large database of test vectors.
Tested over Internet cloud for real time performance.
Tested using network simulator implementation for out of order arrival of packets.
Tested using random arrival time distribution models including linear, uniform, Gaussian and Poisson distribution.
Performance benchmarked using objective evaluation measures such as Log Likelihood Ratio and Weighted Spectral Slope.
Tested in conjunction with CouthIT’s Noise suppression, AGC, AEC and speech codec modules.
Tested for graceful exit in case of errors or exception.
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Tested for 100% code coverage
Range validation of all API parameters.
Code validated on ARM926EJ-S (OMAP L138) platform running Open Embedded Linux.

ARM9E, ARM11, Cortex-A8, and Cortex-A9

Dynamic Range Control (AGC)

CouthIT’s Dynamic Range Compression (DRC) module adjusts the dynamic range of a audio signal based on the audio level of the input signal. The DRC algorithm attenuates the high audio level part of the input signal to the user desired level so as to not sound uncomfortably loud. This module can be used in home theatre systems, portable audio players, media players, in-car entertainment, broadcast applications, smart phones, VoIP applications and digital hearing aids.

Optimized ASM/C implementation.
Re-entrant implementation.
C-callable APIs.
Operates on 16-bit PCM audio data sampled at 8, 11.025, 12, 16, 22.05, 24, 32, 44.10, 48KHz.
Provides optional make up gain to be used on the output signal to restore the loss in audio level.
Provides support for user selectable frame length(number of samples per channel per frame to operate on).
User selectable compression threshold level.
User selectable attack and release times.
Provides soft knee for smooth gains transitions avoiding perceptual distortion.
Support for wide range of configurable compression ratio from 1dB to 15dB with respect to input audio level.
No amplification in case of silence intervals by user selectable noise floor.
Optimized for low memory foot print and low complexity.
Supports Little-Endian implementation on ARM.
Optional support for xDM APIs.

Tested using a large database of audio test vectors for sampling rate from 8KHz to 48 KHz.
Tested for different audio levels from -3dBov to -40dBov.
Listening tests performed to ensure that no artifacts are present in output stream.
Tested for graceful exit in case of errors or exception.
Module is fully interruptible.
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Tested for illegal memory access by the module on ARM platform.
Tested for 100% code coverage
Range validation of all API parameters.
ARM implementation validated on ARM926EJ-S and Cortex-A8 platforms.

ARM9E, ARM11, Cortex-A8, and Cortex-A9

WMA VCE, WMA Voice

Windows Media Voice (WMA VCE) is a low bit-rate codec designed by Microsoft to compress speech signals. The codec uses Codebook-Excited Linear Prediction (CELP), wherein the method of linear prediction in conjunction with analysis-by-synthesis technique is used coding. Optionally, the codec also supports music signal where it uses the low bit-rate WMA Standard. WMA VCE supports four sampling rates 8 khz, 11.025khz, 16khz and 22.05 khz and bit rates ranging from 4kbps to 20kbps and can accept only mono streams. WMA VCE content is packed using the ASF container format. Windows Media Voice is used in streaming compressed voice over the Internet for radio and is also used in voice recorders and in low bit-rate streaming applications.

Based on Windows media porting kit (WMPK) version 9 provided by Microsoft.
Optimized C implementation.
Re-entrant implementation.
C-callable APIs.
Supports sampling frequencies 8KHz, 11.025KHz, 16KHz and 22.05KHz.
Supports bit-rates ranging from 4kbps to 20kbps.
Supports decoding of ASF content.
Optional support for xDM APIs on TI platforms.

Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
Tested for graceful exit in case of bit-stream related errors or exception.
Module is fully interruptible
Tested for Input buffer corruption.
Tested for I/O buffer alignment requirements.
Tested for multi-instance implementation.
Tested for 100% code coverage.
Range validation for all the API parameters.
Tested with scratch contamination at frame boundaries.
ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

ARM9E, ARM11, Cortex-A8, and Cortex-A9.

WMA STD DECODER

Windows Media Audio Standard (WMA STD) was first introduced by Microsoft in the year 1999. It operates on 16-bit audio signals, mono or 2-channel stereo, sampled at 8-48 KHz and generates compressed bit-streams having bit-rates in the range of 5 384 kbps. The compressed bit-stream is represented by the Advanced Streaming Format (ASF) which packetizes the payloads and frames. ASF format makes it suitable for streaming and portable applications. WMA STD is a transform domain based codec and is based on the modified discrete cosine transform. It is one of the most popular audio codecs and has been extensively deployed in portable media players, mobile phones, as well as network connected devices. WMA STD is Microsoft’s proprietary audio codec subjected to terms and conditions of Microsoft License agreement.

Based on Windows media porting kit (WMPK) version 10 provided by Microsoft.
Optimized ASM/C implementation.
Re-entrant implementation
C-callable APIs
Supports sampling frequencies ranging from 8KHz to 48KHz.
Supports forcing the output to 16-bit and 24-bit PCM.
Supports bitrates ranging from 5 kbps to 384 kbps.
Supports for mono and stereo (2 channel) output.
Support for Class 4 implementation of WMA STD(Decoding of WMA v4.0/v4.1 files)
Supports ASF container format as part of WMA decoder library.
Supports downmixing to mono output.
Supports Interleaved and de-interleaved output.
Supports MBR (Multi Bit Rate) streams and can select the required bit-rate at the init-time.
Decodes the audio content in WMV streams.
Supports Little-Endian implementation on C64x+ and ARM
Implementation meets the conformance criteria mentioned by Microsoft and it is certified by Microsoft.
Optional support for xDM APIs

Implementation is tested for wide range of standard and non-standard test vectors.
Tested for conformance with Microsoft CTT (Conformance Test Tool).
Tested for graceful exit in case of bit-stream related errors or exception.
Tested for illegal memory access by the module on C64x+ and ARM platforms.
Module is fully interruptible (maximum interrupt latency on C64x+ is 6000 cycles).
Tested for compliance with register preservation requirements
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Tested with scratch contamination at frame boundaries
Tested for 100% code coverage
Range validation of all API parameters
TI C64x+ implementation is validated on Spectrum Digital DM6467/DM6446 EVM and OMAP3530 platform using DVTB.
ARM implementation is validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

ARM9E, ARM11, Cortex-A8, Cortex-A9, and TI C64x+

WMA PRO Decoder

Windows Media Audio Professional (WMA Pro) was introduced by Microsoft in the year 2003. It operates on 16/24 bit audio signals sampled at 8-96 KHz and generates compressed bit-streams having bit-rates in the range of 8 384 kbps. WMA Pro offers advanced capabilities when compared to the popular WMA STD audio codec from Microsoft. It supports mono to 7.1 channel surround audio. It uses Frequency Extension (FEX) and Channel Extension (CHEX) techniques to produce high quality signals at low bit rates. FEX uses the concept of bandwidth extension and CHEX is used to produce stereo output from single channel. Further, the codec also provides support for features such as dynamic range control and channel down-mixing. The codec is designed for portable media players, mobile phones, as well as network connected devices. WMA Pro is Microsoft’s proprietary audio codec subjected to terms and conditions of Microsoft License agreement.

Based on Windows media porting kit (WMPK) version 10 provided by Microsoft.
Optimized ASM/C implementation.
Re-entrant implementation
C-callable APIs
Supports sampling frequencies ranging from 8KHz to 48KHz.
Supports forcing the output to 16-bit and 24-bit PCM.
Supports bitrates ranging from 8 kbps to 384 kbps.
Supports from mono to 5.1 channel output.
Support for Class 4 implementation of WMA STD(Decoding of WMA v4.0/v4.1 files)
Supports ASF container format as part of WMA decoder library.
Configuration option to select the STD, M0 or M1 profile during compilation time.
Supports downmixing to mono or stereo output.
Supports Interleaved and de-interleaved output.
Supports DRC at run-time.
Supports MBR (Multi Bit Rate) streams and can select the required bit-rate at the init-time.
Supports init-time option to ignore FEX or CHEX in M0 streams.
Decodes the audio content in WMV streams.
Supports Little-Endian implementation on C64x+ and ARM
Implementation meets the conformance criteria mentioned by Microsoft and it is certified by the Microsoft.
The implementation is xDM 1.0 complaint.

Implementation is tested for wide range of standard and non-standard test vectors.
Tested for conformance with Microsoft CTT (Conformance Test Tool).
Tested for graceful exit in case of bit-stream related errors or exception.
Tested for illegal memory access by the module on C64x+ and ARM platforms.
Module is fully interruptible (maximum interrupt latency on C64x+ is 6000 cycles).
Tested for compliance with register preservation requirements
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Tested with scratch contamination at frame boundaries
Tested for 100% code coverage
Range validation of all API parameters
TI C64x+ implementation is validated on Spectrum Digital DM6467/DM6446 EVM and OMAP3530 platform using DVTB.
ARM implementation is validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

ARM9E, ARM11, Cortex-A8, Cortex-A9, and TI C64x+

Windows Media Audio Professional (WMA Pro) was introduced by Microsoft in the year 2003. It operates on 16/24 bit audio signals sampled at 8-96 KHz and generates compressed bit-streams having bit-rates in the range of 8 384 kbps. WMA Pro offers advanced capabilities when compared to the popular WMA STD audio codec from Microsoft. It supports mono to 7.1 channel surround audio. It uses Frequency Extension (FEX) and Channel Extension (CHEX) techniques to produce high quality signals at low bit rates. FEX uses the concept of bandwidth extension and CHEX is used to produce stereo output from single channel. Further, the codec also provides support for features such as dynamic range control and channel down-mixing. The codec is designed for portable media players, mobile phones, as well as network connected devices. WMA Pro is Microsoft’s proprietary audio codec subjected to terms and conditions of Microsoft License agreement.

Based on Windows media porting kit (WMPK) version 10 provided by Microsoft.
Optimized ASM/C implementation.
Re-entrant implementation
C-callable APIs
Supports sampling frequencies ranging from 8KHz to 48KHz.
Supports forcing the output to 16-bit and 24-bit PCM.
Supports bitrates ranging from 8 kbps to 384 kbps.
Supports from mono to 5.1 channel output.
Support for Class 4 implementation of WMA STD(Decoding of WMA v4.0/v4.1 files)
Supports ASF container format as part of WMA decoder library.
Configuration option to select the STD, M0 or M1 profile during compilation time.
Supports downmixing to mono or stereo output.
Supports Interleaved and de-interleaved output.
Supports DRC at run-time.
Supports MBR (Multi Bit Rate) streams and can select the required bit-rate at the init-time.
Supports init-time option to ignore FEX or CHEX in M0 streams.
Decodes the audio content in WMV streams.
Supports Little-Endian implementation on C64x+ and ARM
Implementation meets the conformance criteria mentioned by Microsoft and it is certified by the Microsoft.
The implementation is xDM 1.0 complaint.

Implementation is tested for wide range of standard and non-standard test vectors.
Tested for conformance with Microsoft CTT (Conformance Test Tool).
Tested for graceful exit in case of bit-stream related errors or exception.
Tested for illegal memory access by the module on C64x+ and ARM platforms.
Module is fully interruptible (maximum interrupt latency on C64x+ is 6000 cycles).
Tested for compliance with register preservation requirements
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Tested with scratch contamination at frame boundaries
Tested for 100% code coverage
Range validation of all API parameters
TI C64x+ implementation is validated on Spectrum Digital DM6467/DM6446 EVM and OMAP3530 platform using DVTB.
ARM implementation is validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

ARM9E, ARM11, Cortex-A8, Cortex-A9, and TI C64x+

Vorbis Decoder

Vorbis is an open source codec first introduced by Xiph foundation in the year 2002. Vorbis encoder can operate on 8-32 bit PCM audio signals sampled at 8-192 KHz and generates compressed bit-streams having bit-rates in the range of 8 1536 kbps. Vorbis is based on the modified discrete cosine transform and uses vector quantization to represent the transformed coefficients. The compressed bit-stream can be represented in Ogg (container format for file transport) or RTP (for network multicast) packing format. Vorbis is a royalty free codec and has been deployed in gaming and audio broadcasting applications.

Based on TREMOR open source standard version 1.0.0
Optimized ASM/C implementation.
Re-entrant implementation
C-callable APIs
Support for 16/24 bit PCM output audio signals sampled at 8 KHz 64 KHz.
Support for up to 5.1 audio channels.
Support bit-rates ranging from 8kbps to 1536kbps.
Supports down-mixing to mono or stereo.
Supports Interleaved and de-interleaved output.
Supports decoding of bit-rate peeled streams
Supports decoding of streams packed using ogg container.
Supports decoding of Vorbis audio packets from multiplexed streams containing audio, video and any other metadata.
Supports Little-Endian implementation on ARM
Optimized for low memory foot print.
Optional support from 64 to 96KHz sampling rates(Table Memory Increases for this support)
Optional support for xDM API’s.

Tested for bit-compliance using a large database of audio test vectors
Tested for mono, 2-channel, and 5-channel stereo test vectors
Tested for graceful exit in case of bit-stream related errors or exception.
Tested for illegal memory access by the module on ARM platform.
Module is fully interruptible.
Tested for compliance with register preservation requirements
Tested for Input buffer corruption
Tested for I/O buffer alignment requirements
Tested for multi-instance implementation.
Tested with scratch contamination at frame boundaries
Tested for 100% code coverage
Range validation of all API parameters
ARM implementation is validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

ARM9E, ARM11, Cortex-A8, and Cortex-A9

Parallel Redundancy Protocol

OVERVIEW

SALIENT FEATURES

OUR EXPERTISE

For More details and to discuss requirements

5-Port Industrial Ethernet Switch

OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

VOIP ON ARM

MODULE OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

SAMPLE RATE CONVERTER

MODULE OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

JITTER BUFFER

MODULE OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

Dynamic Range Control (DRC)

MODULE OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

WMA VCE, WMA Voice

CODEC OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

WMA STD DECODER

CODEC OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

WMA PRO DECODER

CODEC OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details

WMA PRO DECODER

CODEC OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For resource requirements & other details

VORBIS DECODER

CODEC OVERVIEW

SALIENT FEATURES

TESTING FEATURES

AVAILABLE PLATFORM(S)

For datasheet with resource usage details