Enhanced Variable Rate Codec Narrowband-Wideband (EVRC-NW or Service Option 73 [SO 73]) was standardized by 3GPP2 in 2010. The EVRC-NW codec operates on each 20 ms frame of 16-bit speech signals sampled at 8 or16 KHz and generates compressed bit-stream of 171, 80, 40, or 16 bits respectively. This codec is an extension of both EVRC-B and EVRC-WB speech codecs and provides enhanced voice quality than EVRC-B and high spectral efficiency than EVRC-WB. It supports 8 different operating modes. EVRC-NW is interoperable with all modes of EVRC-WB and modes 0, 2 – 7 of EVRC-B. The codec supports mode change at frame boundaries and also contains a generic audio coding mode that can be used for handling non-speech signals such as music-on-hold and ring back tones. The principal applications of this codec are IP telephony, wideband telephony, video-telephony, gaming, streaming, ring back tones, media gateways and voice messaging servers.
- Based on 3GPP2 specification.
- Optimized ASM/C implementation.
- Re-entrant implementation.
- C-callable APIs.
- Operates on speech signals sampled at 8 or 16 KHz.
- Support for switching the anchor operating mode during run time.
- Support for 7.5, 8.3, 6.64, 6.18, 5.82, 5.45, 5.08, and 4.0 kbps average source encoding bit-rates.
- The maximum and minimum bit-rates can be configured during initialization.
- The noise suppression module can be configured during initialization.
- Support for dim and burst, eighth rate hangover, and null traffic frame features specified in the standard.
- Support for RTP payload format as specified in the Internet Draft draft-ietf-avt-rtp-evrc-nw-01”.
- Support for DTMF and TTY/TDD signals as specified in the standard.
- Supports integrated Packet Loss Concealment (PLC) algorithm.
- Support for post-filter operation, configurable at frame boundary.
- Supports integrated DTX mode of operation.
- Support for choosing Motorola DTX/QualComm DTX at compile time.
- Support for encoding music signals.
- Support for decoding music signals.
- Support for setting the minimum and maximum DTX update interval during initialization
- Optional support for xDM APIs.
- Tested for bit-exactness with standard as well as a large database of non-standard test vectors (TI).
- Module is fully interruptible.
- Tested for compliance with register preservation requirements.
- Tested for Input buffer corruption.
- Tested for I/O buffer alignment requirements.
- Tested for multi-instance implementation.
- Tested for 100% code coverage.
- Range validation for all the API parameters.
- Tested with scratch contamination at frame boundaries.
- Tested for packet loss conditions with 5% loss to 25% loss.
- TI C55x implementation validated on Spectrum Digital C5510 DSK.
- TI C64x+ implementation validated on Spectrum Digital C6455 DSK, DM6467, DM6446, and OMAP3530 platforms.
- AMD/Intel floating-point optimized implementation validated on Intel cores supporting SSE4 and above.
TI C55x, TI C64x+, and AMD/Intel 64-bit cores supporting SSE4 and above.