ILBC
CODEC OVERVIEW
Internet Low Bit Rate Codec (ILBC) was standardized by Global IP Sound (GIPS) in 2002. The codec operates on 20 or 30 ms, 16-bit PCM input speech signals sampled at 8 KHz, and generates a compressed bit-stream having a bit-rate of 15.2 or 13.3 kbps respectively. It uses a block independent linear prediction coding technique that prevents propagation of errors across frames. The codec has an inherent support for voice activity detection and packet loss concealment. The codec is royalty free and is used in voice over cable/IP, audio teleconferencing, streaming, archival, and messaging applications. It is one of the codecs supported by the Google WebRTC.
SALIENT FEATURES
- ARM implementation is based on floating-point ANSI-C specifications in RFC3951
- C6x/AMD/Intel implementation is based on fixed-point reference c-code available as part of WebRTC project.
- Optimized ASM/C fixed-point implementation
- Re-entrant implementation
- C-callable APIs
- Operates on 16-bit PCM speech signals sampled at 8 KHz
- Support for 15.2 and 13.3 kbps bit-rates
- Support for RTP payload format as specified in RFC 3952.
- Supports integrated Packet Loss Concealment (PLC) algorithm.
- Support for bad frame indication at frame boundary.
- Support for little-endian implementation (ARM)
- Support for big- and little-endian implementation (TI C6x)
- TI C66x/C64x+ implementation bit-compliant with Google WebRTC
- Optional support for xDM APIs.
- C6x implementation supports VAD/DTX/CNG, integrated from WebRTC project
TESTING FEATURES
- ARM implementation tested objectively and via listening tests using a large database of speech test vectors
- C6x implementated tested for bit-compliance with the fixed-point C reference available with WebRTC project
- Module is fully interruptible
- Tested for any illegal memory access by the module
- Tested for compliance with register preservation requirements
- Tested for Input buffer corruption
- Tested for I/O buffer alignment requirements
- Tested for multi-instance implementation
- Tested for 100% code coverage
- Range validation for all the API parameters
- Tested with scratch contamination at frame boundaries
- Tested for packet loss conditions with 5% loss to 25% loss
- ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
- C66x implementation validated on the C6678 EVM platform
- C64x+ implementation validated on the C6472 EVM platform
- C6x implementations are integrated with WebRTC application and validated for interoperability
- AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)
TI C64x+, TI C66x, ARM9E, ARM11, Cortex-A8, Cortex-A9, and AMD/Intel 64-bit cores supporting SSE4 and above.