G.726 speech codec was standardized by ITU-T in 1990. The codec converts a G.711 encoded speech signals sampled at 8 KHz to a 16, 24, 32, or 40 kbps bit-stream respectively and vice-versa. It is based on Adaptive Differential Pulse Code Modulation (ADPCM) algorithm. Annex A allows use of uniform PCM interface at input and output. It is used in VoIP applications.
- Based on ITU-T specification.
- Optimized ASM/C implementation.
- Re-entrant implementation.
- C-callable APIs.
- Operates on G.711 encoded bit-stream or speech signals sampled at 8 KHz.
- Support for 16, 24, 32, 40 kbps bit-rates.
- Support for configurable frame sizes.
- Support for RTP payload format as specified in RFC 3551.
- Optional support for VAD/DTX/CNG and PLC modules.
- The implementation supports both Little-Endian and Big-Endian (on ARM and C64x platforms).
- Optional support for xDM APIs on TI platforms.
- Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
- Module is fully interruptible (Maximum interrupt latency on C64x is 6000 cycles).
- Tested for any illegal memory access by the module (C64x and ARM).
- Tested for compliance with register preservation requirements.
- Tested for Input buffer corruption.
- Tested for I/O buffer alignment requirements.
- Tested for multi-instance implementation.
- Tested for 100% code coverage.
- Range validation for all the API parameters.
- Tested with scratch contamination at frame boundaries.
- ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
- TI C64x implementation validated on Spectrum Digital C6416 DSK.
- TI C55x implementation validated on Spectrum Digital C5510 DSK.
- AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x, TI C64x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.