WMA STD Decoder

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WMA STD DECODER

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Codec overview

Windows Media Audio Standard (WMA STD) was first introduced by Microsoft in the year 1999. It operates on 16-bit audio signals, mono or 2-channel stereo, sampled at 8-48 KHz and generates compressed bit-streams having bit-rates in the range of 5 384 kbps. The compressed bit-stream is represented by the Advanced Streaming Format (ASF) which packetizes the payloads and frames. ASF format makes it suitable for streaming and portable applications. WMA STD is a transform domain based codec and is based on the modified discrete cosine transform. It is one of the most popular audio codecs and has been extensively deployed in portable media players, mobile phones, as well as network connected devices. WMA STD is Microsoft's proprietary audio codec subjected to terms and conditions of Microsoft License agreement.

Salient features

  • Based on Windows media porting kit (WMPK) version 10 provided by Microsoft.
  • Optimized ASM/C implementation.
  • Re-entrant implementation
  • C-callable APIs
  • Supports sampling frequencies ranging from 8KHz to 48KHz.
  • Supports forcing the output to 16-bit and 24-bit PCM.
  • Supports bitrates ranging from 5 kbps to 384 kbps.
  • Supports for mono and stereo (2 channel) output.
  • Support for Class 4 implementation of WMA STD(Decoding of WMA v4.0/v4.1 files)
  • Supports ASF container format as part of WMA decoder library.
  • Supports downmixing to mono output.
  • Supports Interleaved and de-interleaved output.
  • Supports MBR (Multi Bit Rate) streams and can select the required bit-rate at the init-time.
  • Decodes the audio content in WMV streams.
  • Supports Little-Endian implementation on C64x+ and ARM
  • Implementation meets the conformance criteria mentioned by Microsoft and it is certified by Microsoft.
  • Optional support for xDM APIs

Testing features

  • Implementation is tested for wide range of standard and non-standard test vectors.
  • Tested for conformance with Microsoft CTT (Conformance Test Tool).
  • Tested for graceful exit in case of bit-stream related errors or exception.
  • Tested for illegal memory access by the module on C64x+ and ARM platforms.
  • Module is fully interruptible (maximum interrupt latency on C64x+ is 6000 cycles).
  • Tested for compliance with register preservation requirements
  • Tested for Input buffer corruption
  • Tested for I/O buffer alignment requirements
  • Tested for multi-instance implementation.
  • Tested with scratch contamination at frame boundaries
  • Tested for 100% code coverage
  • Range validation of all API parameters
  • TI C64x+ implementation is validated on Spectrum Digital DM6467/DM6446 EVM and OMAP3530 platform using DVTB.
  • ARM implementation is validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

Available Platform(s)

ARM9E, ARM11, Cortex-A8, Cortex-A9, and TI C64x+

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